1. Field of the Invention
Generally, the present disclosure relates to the electrochemical treatment of a surface of a substrate used for forming microstructural features, such as circuit elements of integrated circuits, using a reactor and a movable electrode or fluid application assembly to remove material from the substrate surface.
2. Description of the Related Art
In many technical fields, the electrochemical treatment of a substrate surface, such as the deposition of metal layers on, and/or the removal of metal from, the substrate surface, is a frequently employed technique. For example, for efficiently depositing relatively thick metal layers on a substrate surface, plating, in the form of electroplating or electroless plating, has proven to be a viable and cost-effective method and, thus, electroplating has become an attractive deposition method in the semiconductor industry. Similarly, the removal of metal from exposed substrate surfaces is frequently performed on the basis of an electrochemical treatment, which is also referred to as electrochemical etching.
Generally, electrochemical deposition or removal of metals, such as electroplating or electrochemical etching, may be accomplished on the basis of an appropriate electrolyte containing respective metal ions that are electrically neutralized at the substrate surface, which may act as the cathode during electroplating, thereby resulting in the deposition of metal atoms on the electrically negative surface. The amount of metal deposited is proportional to the current flowing through the electrolyte according to Faraday's law. Similarly, during electrochemical etching, the substrate surface may act as a consumable anode, wherein the metal atoms of the substrate surface that is in contact with the electrolyte solution are ionized and dissolved into the solution. The corresponding metal ions may, depending on the chemistry of the metal and the salt in the solution, deposit on a respective cathode, as previously described with respect to the electrochemical deposition, fall out as precipitate or stay in the solution.
During the last decade, copper has become a preferred candidate for forming metallization layers in sophisticated integrated circuits, due to the superior characteristics of copper and copper alloys in view of conductivity and resistance to electromigration compared to, for example, the commonly used aluminum. Since copper may not be deposited very efficiently by physical vapor deposition, for example by sputter deposition, with a layer thickness on the order of 1 μm and more, electroplating of copper and copper alloys is presently a preferred deposition method for forming metallization layers. Using the copper damascene approach, that is, forming metallization layers by filling vias and trenches previously patterned into a dielectric layer with metal on the basis of an electrochemical deposition process, much experience has been gained in the field of semiconductor manufacturing with respect to electrochemical processes and chemistries. It has been recognized that the electrochemical processes may have the potential of applicability in many other opportunities in the field of semiconductor manufacturing. Thus, in addition to metal deposition using electrolytic and/or electroless processes, electrochemical etching, electrophoretic deposition, anodization, electropolishing and the like may also be used in various manufacturing stages. Generally, electrochemical deposition may be divided into “through-mask” deposition and blanket deposition, each regime requiring respective electrochemical process tools and strategies. For example, the copper damascene regime is one of the presently most important blanket deposition techniques, in which the metal is blanket deposited above a patterned surface, while, after the deposition, excess material may be removed on the basis of planarization techniques, such as chemical mechanical polishing (CMP), electrochemical etching and the like in order provide the isolated metal regions.
A typical process representing the through-mask deposition regime is the electro-chemical deposition used for chip packaging. The process of forming solder bumps for directly connecting the solder bumps to respective solder pads of a package material is increasingly gaining in importance due to a plurality of advantages offered by this packaging technique. For example, increased input/output capability for the same chip area may be obtained compared to wire bonding in which the bond pads are substantially restricted to the periphery of the chip. The solder bumps are typically formed on an appropriate metallization layer stack, which may sometimes be referred to as underbump metallization that provides the desired adhesion and electrical, mechanical and thermal characteristics during the deposition process and during operation of the device. For example, titanium and tungsten may frequently be used in combination with copper and chromium for underbump metallization layers, wherein a substantially pure copper layer may be provided as the last layer, on which the solder material may be deposited to form a highly stable intermetallic compound upon re-flowing the deposited solder material. During the electrochemical deposition of the solder material, the underbump metallization layer may also act as a current distribution layer and a seed layer for the appropriate initialization of the electrochemical process. By forming a deposition mask, such as a resist mask, the deposition of the solder material may be restricted to well-defined locations on the underbump metallization, thereby also defining the lateral dimensions of the solder bumps. After the electrochemical deposition of the solder material, the continuous underbump metallization layer has to be removed from dedicated locations in order to provide electrically isolated solder bumps. For this purpose, the copper-based metals of the underbump metallization layer may be efficiently removed on the basis of electro-chemical etch techniques, while the adhesion layer, such as the titanium/tungsten layer, may require sophisticated wet and/or dry chemical etch techniques.
The electrochemical removal of the copper material is, among other factors, one important aspect that determines the finally achieved uniformity of the solder balls after re-flowing the solder bumps. During the re-flow process, the copper-based material that has been maintained after the electrochemical etching process defines an island of wetting material for the liquid solder material, thereby also determining the lateral dimension and thus the height, as well as the adhesion strength, of the solder ball. That is, during the re-flow process, the molten solder material forms a metallic compound with the copper-based wetting surface, wherein the corresponding process is substantially restricted to the area of the wetting surface, thereby creating a solder ball firmly connected to the wetting surface with a substantially round shape outside the wetting surface caused by gravity and the surface tension of the molten solder material. Hence, a precise definition of the lateral dimension of the wetting surface during the electrochemical etching process requires a precise and uniform degree of “undercut” and a reliable removal of unwanted wetting material between the solder bumps during the etch process, in which the solder bumps act as an etch mask.
Thus, the selective removal of the seed layer(s) of the underbump metallization requires accurate control of the uniformity of the removal rate within individual substrates and among a plurality of substrates in order to obtain a reliable electrical connection of the solder balls with respective solder pads of a chip package during chip packaging, since failure of one single solder ball/pad connection out of the hundreds or thousands of connections may render the device non-operational.
One specific type of an electrochemical etch tool is a reactor using jets of electrolyte and a scanning cathode of defined lateral dimensions that is moved relative to the substrate surface, thereby providing enhanced control of the removal rate. It has been recognized that the removal of material of the conductive seed layer(s) across the entire substrate surface on the basis of a cathode exposing the entire substrate surface may result in moderate process non-uniformities, since layer portions located more closely to the current source may be removed more efficiently compared to remote layer portions, thereby possibly isolating remote areas and thus disconnecting these isolated layer portions from the required current flow prior to completely removing these layer portions. By scanning a cathode of restricted dimensions across the substrate while supplying electrolyte solution between the gap formed between the scanning cathode and the surface to be etched, well-defined process conditions may be locally established on the basis of the gap distance, the scanning speed, the process voltage or current and the like, wherein the locally restricted process area may provide enhanced uniformity, reduced current capability required for the current source, increased process flexibility and the like, as for instance the scanning speed may be used as an efficient process parameter for adjusting the overall process performance.
For example, in some systems for electrochemical etching, a substantially rectangular etch bar or paddle may be moved in a linear motion across the surface to be etched, which is mounted in an appropriate substrate holder with the surface facing downward into a container for receiving electrolyte solution that is applied to the surface portion presently overlapping with the moving cathode by means of respective openings provided on the moving cathode. The cathode may be attached to a drive assembly. During operation of conventional systems, such as the one described above, the mechanical components of the drive assembly attached to the tool frame and thus to the container at the bottom area of the tool, such as rails, ball bearings and the like, may be contaminated by process fluids leaking through respective openings in the frame or container, thereby causing deterioration of these components and resulting in increased process non-uniformities, since non-uniformity of the mechanical response of the drive assembly may result in a non-controlled etch rate during the scanning process. Furthermore, any instabilities with respect to fluid flow, composition of chemicals, temperature fluctuations and the like may also affect the complex etch process, thereby contributing to respective non-uniformities of the solder ball structure.
Although, typically, respective advanced control strategies are applied for maintaining the process parameters within the specific target value ranges for each type of process recipe of the various product types that are processed in the electrochemical etch process tool, the corresponding process non-uniformities may remain undetected over extended process periods, as the respective measurement results reflecting the process output of the process tool may be obtained after the processing of a plurality of substrates. Hence, the delayed response of the delivery of measurement results for characterizing the performance of the electrochemical etch process may result in a significant yield loss upon occurrence of a tool failure or process deviation. Moreover, it may be difficult to distinguish between tool-specific failures, which may require immediate maintenance or may indicate an upcoming tool insufficiency, or process-related deviations that may be compensated for by the control algorithm. Thus, in automated process environments, as are typically used in modern semiconductor fabrication, a plurality of non-usable substrates may be produced before a corresponding failure may be detected, thereby significantly contributing to yield loss in a late manufacturing stage, in which the devices have undergone most of the complex process steps. Furthermore, frequent maintenance events may have to be performed to reduce tool failure induced yield loss, thereby, however, significantly reducing tool availability and process throughput.
The present disclosure is directed to various methods and systems that may avoid, or at least reduce, the effects of one or more of the problems identified above.